1. Field of the Invention
The present invention relates to a transmission device, and more particularly, to a transmission devices with enhanced signals.
2. Description of the Prior Art
Many flat panel display (FDP) devices nowadays use the two-level signal transmission interface, such as RSDS, mini-LVDS etc. The requirement of the data and the clock rate increases with the higher resolution, various color depth, and higher frame rate. The multi-level signal transmission can transmit more information than the two-level signal transmission in one clock cycle, so the number of signal lines and the clock rate can be decreased in the multi-level signal transmission.
Please refer to FIG. 1 to FIG. 3. There are two architectures that the FDP device transmits the display data from the timing controller (Tcon) to the source driver, the bus signaling type architecture and the dedicated signaling type architecture. FIG. 1 illustrates the bus signaling type architecture of N source drivers. The source drivers CD1 to CD(N) share m signal lines which are coupled to all source drivers from the timing controller. FIG. 2 illustrates the dedicated signaling type architecture of N source drivers. Each source driver has n dedicated signal lines coupled to the predetermined source driver respectively from the timing controller. FIG. 3 is a schematic diagram of a connection of a timing controller and a source driver. For example, ten source drivers (N=10) use the dedicated signaling type architecture, and each source driver uses two pairs of differential signal lines (n=4), CDi_0P, CDi_0N, CDi_1P and CDi_1N respectively, where i is from 1 to N. Each pair of the differential signals has a terminal circuit T. The terminal circuit T is installed outside the source driver. The terminal circuits T of the transmission pair is coupled to the common mode voltage (CDi_VCOM).
Please refer to FIG. 4. FIG. 4 is a system block diagram of a transmission device according to the prior art. The transmission device 10 includes an encoder 11 and a transmitter 13. The transmitter 13 includes a current source module 14 and a switch module 15. The encoder 11 converts a display signal to a control signal. The switch module 15 controls the value and the direction of the current outputted from the current source module 14 according to the control signal so as to generate a current signal.
Please refer to FIG. 5 and FIG. 6, FIG. 5 is a circuitry of the two-level transmission device according to the prior art. FIG. 6 is a truth table of the encoder. The transmission device 20 includes an encoder 21 and a transmitter 23. The encoder 21 converts a displaying signal D0 to a control signal (SWn/SWp/SWBn/SWBp). The transmitter 23 includes a plurality of the current sources 24 and a switch module 25. The current source 24 can generate the positive current +I and the negative current −I. As the truth table shown in FIG. 6, the switch module 25 includes switches SWn, SWp, SWBn and SWBp. The switches SWn, SWp, SWBn and SWBp are controlled by the control signal. The control signal represents logic“1” when the switch is turned on. The control signal represents logic“0” when the switch is turned off. The switches SWp and SWBn are turned on when the displaying signal D0 represents logic“1”. Thus, the current flowing to the signal line DATAP is +I and the current flowing to the signal line DATAN is −I. The switches SWBp and SWn are turned on when the display signal D0 represents logic“0”. Thus, the current flowing to the signal line DATAP is −I and the current flowing to the signal line DATAN is +I.
Please refer to FIG. 7 and FIG. 8. FIG. 7 is a circuitry of the four-level transmission device according to the prior art. FIG. 8 is a truth table of the encoder. The transmission device 30 includes an encoder 31 and a transmitter 33. The encoder 3I converts a display signal D0/D1/D2/D3 into the control signal (P1˜P8/N1˜N8). The transmitter 33 includes a plurality of current sources 24 and a gate module 35. The plurality of the current sources 24 can provide the positive current +I, +3I and the negative current −I, −3I. The switch module 35 includes switches P1˜P8 and N1˜N8. As the truth table shown in FIG. 8, the switches P1˜P8 and N1˜N8 are controlled by the control signal. The Switches P1, P7, N2, and N8 are turned on when the display signal D0/D1/D2/D3 is 0/0/0/0. The current of signal lines DATA1Nx is +I. The current of signal lines DATA1Px is −I. The current of signal lines DATA0Nx is +3I. The current of signal lines DATA0PX is −3I.
Please refer to FIG. 9. FIG. 9 is a schematic diagram of a display device. The signal outputted from the transistor TX will go through a series of channels before being received by the receiver RX. However, the condition of the channel varies with the size of the panel. The channel between the transistor TX and the receiver includes TX pad, Package Wire, Package Lead, CB PCB Trace, Connector, FPC, Bonding, SB PCB Trace, Golden Finger, COF Trace and RX pad. The channel includes many kinds of different transmission media. Therefore, channel effects include the impedance mismatch, the signal coupling, and the signal loss.
In conclusion, with the size increase of FDP, the trace of PCB and the number of connecters may increase as well, so the channel effects become more serious. The increase of the clock skew between the data and the clock cycle as well as the distortion of the data and the clock cycle themselves, both will cause the serious signal loss and decrease the precision of the signal receiving capability of the receiver. Thus, the more complicated circuit is required for receiving and reading the signal correctly.